Folded interposer

ABSTRACT

A folded interposer used to achieve a high density semiconductor package is disclosed. The folded interposer is comprised of a thin, flexible material that can be folded around one or multiple semiconductor die in a serpentine fashion. The semiconductor die are then attached to a substrate through electrical contacts on the interposer. The folded interposer allows multiple semiconductor die to be efficiently stacked in a high density semiconductor package by reducing the unused or wasted space between stacked semiconductor die. Vias extending through the folded interposer provide electrical communication between the semiconductor die and the substrate. The present invention also relates to a method of packaging semiconductor die in a high density arrangement and a method of forming the high density semiconductor package.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor die package.More particularly, the present invention relates to a folded interposerused to increase the semiconductor die density of a high densitysemiconductor package.

[0003] 2. Background of Related Art

[0004] As electronic devices, such as cell phones and personal digitalassistants (“PDAs”), become smaller, more portable, and moretechnologically advanced, there is an increasing need for high densitysemiconductor die packages that can provide the necessary memory forthese devices. New, high density semiconductor packages must be easilyand cheaply manufactured with existing equipment. In addition, thepackage must maintain the reliability and quality of the semiconductordie. A semiconductor die package contains many electrical circuitcomponents that must be interconnected to form functional, integratedcircuits.

[0005] Consumers want their portable devices to perform the samefunctions as their desktop computers, therefore requiring large amountsof memory in a much smaller electronic device. One way of accomplishingthis is to increase the density of a semiconductor die package by usingthe package's real estate more efficiently. One advantage of highdensity packaging is that it decreases the length of the connectionsbetween the semiconductor die and the package, allowing thesemiconductor die to respond faster. Also, reducing the length of theconnections reduces the signal propagation time and makes the signalpaths less vulnerable to the effects of noise.

[0006] Numerous high density semiconductor packages exist in the art.However, these packages are ill-suited for use in small, portableelectronic devices because they inefficiently use their real estate,which unnecessarily adds to the overall size of the package. Forinstance, U.S. Pat. No. 5,128,831 issued to Fox, III et al. teaches ahigh density package composed of multiple submodules, each of whichcontains a chip bonded to a substrate. A spacer, which is at least asthick as the chip, is adhesively bonded to the peripheral upper surfaceof each submodule before the submodules are stacked to form the highdensity package. The thickness of the spacer causes a gap between eachsubmodule. When multiple submodules are needed, the cumulative effect ofthese gaps makes the package significantly larger than the size of thecomponents used in the package.

[0007] A multichip module comprised of stacked semiconductor die isdisclosed in U.S. Pat. No. 5,323,060, issued to Fogal et al. Thesemiconductor die are electrically connected to a substrate by extendinglong bond wires from bond pads on each semiconductor die to thesubstrate. In order to accommodate the loop height of the bond wires, athick adhesive layer is applied between the semiconductor die. Theadhesive layer must be thick enough that the bond wires of the lowersemiconductor die do not contact the upper semiconductor die. Thismultichip module is not suited for small electronic devices because theadhesive layer between die increases the overall thickness of thesemiconductor package.

[0008] U.S. Pat. No. 5,604,377 issued to Palagonia teaches a stack ofsemiconductor chips designed to be lightweight and to provide bettercooling, mechanical shock, and vibration protection. The chips areseparated by rigid, insulating interposers formed from a rack structurethat contains shelves. The shelves provide electrical insulation andmechanical protection to the chips. The rigid shelves also prevent unduemovement of the chips, while the spacing between shelves allows foradequate heat dissipation. Since the shelves are rigid and provide spacebetween the chips, the packaging scheme is not suited for use in smallelectronic devices.

[0009] U.S. Pat. No. 5,818,197 issued to Pierson et al. teaches anintegrated circuit package that utilizes metallization features, locatedat opposite edges of each chip, to attach a stack of chips to asubstrate. The chips are bonded together through their metallizationfeatures to form a chip stack, which is then bonded to the substrate.The thickness of the metallization features, in addition to the bondingmaterial used, provides a “stand off” or separation between chips. Thisseparation adds to the overall thickness of the integrated circuitpackage, making it incompatible for use in electronic devices thatrequire small semiconductor packages.

[0010] In U.S. Pat. No. 5,994,166 issued to Akram et al. a densesemiconductor package comprising multiple substrates with attached flipchips is disclosed. The substrates are stacked on top of one another.Column-like connections positioned between the stacked substratesprovide electrical communication. The electrical connections must be ofsufficient height to provide enough clearance between substrates tomount components and also must be of sufficient strength to providesupport between the substrates. Since the column-like connections causeunused space between the substrates, this semiconductor package isincompatible with electronic devices that require small semiconductorpackages.

[0011] While numerous high density semiconductor packages exist, theyshare a common disadvantage in that they inefficiently use the space ofthe semiconductor package. The unused or wasted space may be the resultof thick adhesive layers between semiconductor die or may be caused byrigid interposers or other spacers. Small electronic devices, such ascell phones and PDAs, have very limited space and can not afford towaste any of this space. Reducing the wasted or unused space in asemiconductor die package is essential because large packages occupy toomuch of this limited space. It would be preferable to reduce the unusedor wasted space in a stack of semiconductor die by more closely spacingthe semiconductor die. It would be more preferable for the semiconductordie to be spaced substantially one on top of another. It would be mostpreferable for the overall size of a high density semiconductor packageto be caused only by the thickness of the semiconductor die and asubstrate, without substantial thickness coming from additionalpackaging or unused space.

[0012] Methods for connecting die to a substrate are well know in theart. For example, wire bonding, tape automated bonding (“TAB”), andcontrolled collapse chip connection (“C4”) are commonly used tophysically and electrically connect semiconductor die to a substrate.Wire bonding utilizes fine wire conductors bonded on one end to thesubstrate and on the other end to electrical contacts on thesemiconductor die. Because wire bonding requires wires welded to thedie, there must be adequate space to accommodate the wires. TAB utilizespatterned metal on a polymeric tape to join dice together. The joinedsemiconductor dice are attached to a substrate by outer lead bonding.C4, or flip chip, bonding uses solder balls on the surface of asemiconductor die to bond the semiconductor die to a substrate.

[0013] In addition to the above mentioned methods, the prior art alsodiscloses using vias to attach a semiconductor die to a substrate and toprovide electrical communication between the semiconductor die andsubstrate. The vias may be filled with conductive metal or flexibleleads may be run through the vias to provide electrical communication.As mentioned above, U.S. Pat. No. 5,128,831 issued to Fox, III et al.teaches a high density package composed of multiple submodules, each ofwhich contain a chip bonded to a substrate. Each substrate has ametallization pattern, which comprises multiple conductive traces. Aspacer is adhesively bonded to the peripheral upper surface of eachsubmodule before the submodules are stacked. Both the substrate andspacer contain vias that are coincident and substantially coaxial toeach other when the package is assembled. The vias are filled withsolder to electrically connect the traces of all the submodules.Similarly, U.S. Pat. No. 5,148,266 issued to Kane et al., mentioned inmore detail below, uses solid vias to electrically interconnect twochips on opposite sides of a flexible carrier.

[0014] U.S. Pat. Nos. 5,252,857 and 5,682,061 issued to Khandros et al.disclose a semiconductor chip assembly containing a semiconductor chipand a substrate that are separated by an interposer. The interposercontains multiple apertures that extend from the first surface to thesecond surface of the interposer. Flexible leads extending through theapertures are used to connect the chip to terminals on the interposer.The interposer terminals are then connected to contact pads on thesubstrate. The flexible leads allow for movement of the contacts on thechip relative to the contacts on the substrate, thereby reducing thestresses caused by thermal cycling.

[0015] The semiconductor die industry has commonly used flexiblecomponents to ameliorate the problems associated with differentialthermal expansion of a semiconductor die and substrate. If a die andsubstrate have different coefficients of expansion, the heat generatedby operating an electronic device causes the die and substrate to expandat different rates. When the electronic device is turned off, thesemiconductor die and substrate contract at different rates. Over time,these heat cycles place a large amount of mechanical stress on theelectrical contacts and solder connections between the semiconductor dieand substrate. After repeated cycles, the contacts and connections mayfail. The semiconductor die industry has recognized two ways around thisproblem. First, the mechanical stress on the electrical contacts andsolder connections can be minimized by using components that havesimilar coefficients of expansion. However, this severely limits thetypes of components that can be used together. A second way around thisproblem is to incorporate flexible components into the die package.Flexible components known in the art include interposers, circuits,circuit boards, and leads. For example, U.S. Pat. No. 4,851,613 issuedto Jacques teaches a flexible circuit board that can be bent, rolled, orfolded into a desired shape. The circuit board comprises a substrate, alayer of conductive material in which a circuit is formed, and aninsulating layer. Surface mount devices, such as resistors, capacitors,and integrated circuits, can be mounted to the flexible circuit board.Use of the flexible circuit board allows for thermal expansion betweenthe surface mount devices and circuit board without cracking solderjoints or breaking electrical and physical connections.

[0016] In U.S. Pat. Nos. 5,148,266 and 5,682,061 issued to Khandros etal., a semiconductor chip assembly containing an interposer and flexibleleads is disclosed. The interposer separates a semiconductor chip and asubstrate. The chip and substrate electrically communicate throughflexible leads that run through apertures in the interposer. The leadsconnect the chip to terminals on the interposer, which are thenconnected to contact pads on the substrate. The flexible leads allow formovement of the contacts on the chip and therefore reduce the stressescaused by thermal cycling.

[0017] U.S. Pat. No. 5,889,652 issued to Turturro teaches an integratedcircuit package comprising an integrated circuit attached to asubstrate. The substrate includes two portions, a bond portion and acontact portion, separated by a flexible portion. The integrated circuitis attached to the bond portion of the substrate, while the contactportion is attached to a printed circuit board. The flexible portion ofthe substrate allows for relative movement between the package and thecircuit board, minimizing thermal expansion stress on the solder joints.

[0018] U.S. Pat. No. 6,002,590 issued to Farnworth et al. teaches aprinted circuit board that contains traces attached to a flexible tracesurface. Components, such as ball grid array (“BGA”) components, areattached to the traces. The flexible trace surface may be created by thetop surfaces of flexible protuberances, which are formed by etching awaysubstrate not covered by the traces. Alternatively, the flexible tracesurface may be formed by depositing a flexible layer onto the printedcircuit board. The flexible trace surface allows the traces to bedisplaced in a direction of thermal expansion of the attachedcomponents, thus preventing cracking of solder joints between the traceand component.

[0019] U.S. Pat. No. 6,014,320 issued to Mahon et al. teaches a highdensity circuit module that is comprised of a flex circuit attached to asubstrate. The flex circuit is attached to one side of the substrate andfolded over to the other side of the substrate. The resulting moduleincludes integrated circuits on one side of the substrate andinput/output pads on the opposite side.

[0020] While the above mentioned inventions disclose flexible componentsin semiconductor die packages, they only disclose attaching onesemiconductor die to a substrate. Since high density semiconductorpackages are necessary for new generations of electronic devices, itwould be preferable to combine flexible components with semiconductordie packages that can accommodate multiple semiconductor die.

[0021] U.S. Pat. No. 5,252,857 issued to Kane et al., discloses both ofthese features. A dense memory package is disclosed where two memorychips are mounted face-to-face on opposite sides of a flexible carrieror interposer. The two chips contain solder bumps that align when thechips are placed face to face. In addition, the interposer contains padsthat are coated with low melting point solder. The bumps on the chipscontact the pads on the interposer and are soldered together. Kane alsodiscloses a plurality of pairs of chips mounted on opposite sides of aflexible carrier. The flexible carrier with the attached chips can befolded to connect with substrates, such as printed circuit boards. WhileKane discloses a flexible carrier that can be used to connect multipledie to a printed circuit board or backplane, Kane discloses that thepairs of die are mounted face-to-face on opposite sides of the flexiblecarrier.

[0022] The present invention solves the above mentioned problems. Thepresent invention discloses a high density semiconductor package thathas reduced or eliminated the unused space between stacked semiconductordie. The resulting high density semiconductor package of the presentinvention is small, and is therefore useful in portable electronicdevices such as cell phones and PDAs.

SUMMARY OF THE INVENTION

[0023] The present invention relates to a folded interposer and a highdensity semiconductor package that utilizes the folded interposer. Thefolded interposer is comprised of a thin, flexible material that can befolded around one or multiple semiconductor die. The folded interposerallows multiple semiconductor die to be efficiently stacked in a highdensity semiconductor package by reducing the unused or wasted spacebetween stacked semiconductor die. The present invention also relates toa method of packaging semiconductor die in a high density arrangementand a method of forming the high density semiconductor die package.Finally, the present invention relates to a computer system thatincorporates the folded interposer in a high density semiconductor diepackage.

BRIEF DESCRIPTION OF THE DRAWINGS

[0024] While the specification concludes with claims particularlypointing out and distinctly claiming the present invention, theadvantages of the invention can be more readily ascertained from thefollowing detailed description of the invention when read in conjunctionwith the accompanying drawings in which:

[0025]FIG. 1 is a side view of an interposer of the present invention;

[0026]FIG. 2 is a side view of an interposer of the present inventionfolded around one semiconductor die;

[0027]FIG. 3 is a side view of an interposer of the present inventionfolded around two semiconductor die;

[0028]FIG. 4 is a side view of an interposer of the present inventionfolded around two semiconductor die and attached to a substrate;

[0029]FIG. 5 is a side view of an interposer of the present inventionfolded in a serpentine fashion around more than two semiconductor die;and

[0030]FIG. 6 is a side view of an interposer of the present inventionshowing electrical contacts on the top surface of the structure.

DETAILED DESCRIPTION OF THE INVENTION

[0031] Illustrated in drawing FIG. 1 is an interposer 10, which includesa first surface 16 and a second surface 18. The first surface 16includes electrical contacts 20 for attaching the interposer 10 to asubstrate (not shown), such as a printed circuit board. Vias 24 extendthrough the interposer 10 from the first surface 16 to the secondsurface 18 and are in communication with the electrical contacts 20. Thefolded interposer 10 is comprised of a thin, flexible material, such asan insulative polymer. The material has substantially the same width asa semiconductor die so that the material covers the surface of thesemiconductor die. Preferably, the material should also be thermallyconductive to allow for adequate dissipation of heat generated by theelectrical circuitry.

[0032] Illustrated in drawing FIGS. 2 and 3 are that the interposer 10is flexible enough to fold around one or multiple semiconductor die 12.Preferably, the semiconductor die 12 are bare, unpackaged die. As isillustrated in drawing FIG. 2 (vias not shown), the interposer 10surrounds at least three sides of one semiconductor die 12, to form anintermediate packaging structure 28. Illustrated in drawing FIG. 3 (viasnot shown) is an intermediate packaging structure 28 containing multiplesemiconductor die 12, wherein the interposer 10 surrounds at least twosides of each semiconductor die.

[0033] Methods of attaching a semiconductor die to a substrate are wellknown in the art. Any means known in the art for attaching thesemiconductor die to the interposer may be used in the presentinvention. Intermediate packaging structure 28, which includes theinterposer 10 and attached semiconductor die 12, is attached to asubstrate to form a high density semiconductor package 14.

[0034] The present invention also relates to a high densitysemiconductor die package 14 utilizing the folded interposer 10. As isbest illustrated in drawing FIGS. 4 through 6, the folded interposer 10is used to attach one or multiple semiconductor die 12 to a substrate22, thus forming the high density semiconductor package 14. Theinterposer 10, which has two surfaces, is folded around thesemiconductor die 12 to form intermediate packaging structure 28. As isbest illustrated in drawing FIG. 2 (vias not shown), the interposer 10surrounds at least three sides of one semiconductor die 12 inintermediate packaging structure 28. Illustrated in drawing FIG. 3 (viasnot shown) is an intermediate packaging structure 28 containing twosemiconductor die 12, wherein the interposer 10 surrounds at least twosides of each semiconductor die. Since the bond pads 26 of eachsemiconductor die must be in contact with vias 24, multiplesemiconductor die 12 must be positioned in groups of two in aback-to-back configuration so that all semiconductor die 12 are inelectrical communication with substrate 22. Intermediate packagingstructure 28 is then attached to the substrate 22 through the electricalcontacts 20 on the first surface 16 of the interposer. The substrate 22may be any type of semiconductor substrate known in the art, such as aprinted circuit board. The semiconductor die 12 and substrate 22 are inelectrical communication through the bond pads 26 and the electricalcontacts 20, which are in contact with the vias 24. The vias 24 may befilled with a conductive material to provide electrical communicationbetween the semiconductor die 12 and substrate 22.

[0035] The high density semiconductor die package 14 accommodates morethan two semiconductor die by weaving the flexible interposer 10 aroundgroups of two semiconductor dice. Since the bond pads 26 of each diemust be in contact with vias 24, the two semiconductor dice 12 must bepositioned in a back-to-back configuration so that all semiconductor die12 are in electrical communication with substrate 22. As is illustratedin drawing FIG. 5 (bond pads and vias not shown), the interposer weavesin a serpentine fashion between groups of two semiconductor dice.

[0036] As is illustrated in drawing FIG. 5 (bond pads, vias, andsubstrate not shown), the present invention also relates to a method ofpackaging semiconductor die in a high density arrangement. Thesemiconductor die are packaged by providing at least one semiconductordie 12, a flexible interposer 10, and a substrate 22. The interposer 10is folded around and attached to the semiconductor die 12. Theinterposer 10 has a first surface 16, a second surface 18, and vias 24that extend through the interposer 10 from the first surface 16 to thesecond surface 18. The first surface 16 includes electrical contacts 20.The semiconductor die 12 are attached to the interposer 10 through bondpads 26 on the active surface of the semiconductor die 12 to formintermediate structure 28. Intermediate packaging structure 28 is thenattached to substrate 22 through the electrical contacts 20 to form ahigh density semiconductor package 14. This attachment also results inelectrical communication between the semiconductor die 12 and thesubstrate 22. In a high density semiconductor package 14 containing onesemiconductor die 12, the interposer 10 is folded around thesemiconductor die 12 so that at least three sides of the semiconductordie are surrounded, as is illustrated in drawing FIG. 2 (vias andsubstrate not shown). In a high density package 14 containing twosemiconductor die 12, the interposer 10 surrounds at least two sides ofeach semiconductor die 12, as is illustrated in drawing FIG. 3 (vias andsubstrate not shown). Illustrated in drawing FIG. 5 (bond pads, vias,and substrate not shown) is that the interposer 10 weaves in aserpentine fashion between semiconductor die 12 stacked in groups of twowhen a high density package 14 containing more than two semiconductordice 12 is desired. Additionally, electrical contacts 20 may be appliedto a top surface 30 of the package 14, as is shown in drawing FIG. 6(bond pads, vias, and substrate not shown), so that the package 14 canbe attached to other semiconductor devices, depending on the desiredapplication.

[0037] The present invention also relates to a method of forming a highdensity semiconductor die package 14. The high density semiconductor diepackage 14 is formed by providing the interposer 10 and at least onesemiconductor die 12. The semiconductor die 12 are attached to theinterposer 10 to form intermediate packaging structure 28. Theintermediate packaging structure 28 is attached to substrate 22 throughmethods well known in the art, such as wire bonding, C4, TAB, andbonding through vias. In applications where more than two semiconductordice are desired, the semiconductor die 12 are attached to theinterposer 10 in groups of two in a back-to-back configuration.Electrical connection between the substrate 22 and semiconductor die 12is established through the electrical contacts 20 and vias 24 on theinterposer 10. Additionally, electrical contacts 20 may be applied to atop surface 30 of the package 14, as is shown in drawing FIG. 6 (bondpads and vias not shown), so that the package 14 can be attached toother semiconductor devices, depending on the desired application.

[0038] The present invention also relates to a computer system using thefolded interposer 10 and high density semiconductor die package 14. Thecomputer system is comprised of an input device, an output device, aprocessor, and a memory module. The processor is coupled to the inputand output devices. The memory module is coupled to the processor. Thememory module includes a module board and the high density semiconductorpackage 14, which are in electrical contact with each other. The highdensity semiconductor package 14 utilizes the folded interposer 10 ashas been described above.

[0039] Although specific examples demonstrating the present inventionhave been described, it is to be understood that the invention definedby the appended claims is not to be limited by the particular detailsset forth in the above description. One of ordinary skill in the artwould understand that many apparent variations are possible withoutdeparting from the scope of the appended claims. For example, varyingthe number of semiconductor die in the high density semiconductor diepackage would be understood to be within the scope of the appendedclaims. In addition, varying the methods of attaching the die to theinterposer and/or the substrate and the methods of achieving electricalcommunication between the semiconductor die and substrate would beunderstood to be within the scope of the appended claims.

What is claimed is:
 1. A folded interposer comprising: a thin, flexiblematerial comprised of a first surface and a second surface, saidmaterial for folding around at least one semiconductor die havingsubstantially the same width as said at least one semiconductor die; aplurality of vias extending from said first surface to said secondsurface; and a plurality of electrical contacts on said first surface ofsaid material.
 2. The interposer of claim 1, wherein said materialcomprises an insulative polymer.
 3. The interposer of claim 2, whereinsaid material further comprises a thermally conductive material.
 4. Theinterposer of claim 1, wherein said second surface surrounds at leastthree sides of one semiconductor die around which said interposer isfolded.
 5. The interposer of claim 1, wherein said second surfacesurrounds at least two sides of said at least one semiconductor diearound when said interposer is folded.
 6. The interposer of claim 1,wherein said electrical contacts are applied to said second surface ofsaid interposer.
 7. A high density semiconductor package having at leasttwo semiconductor die comprising: a substrate having at least onecontact pad on a surface thereof, a flexible interposer folded around afirst semiconductor die of said at least two semiconductor die, saidinterposer including a first surface having a plurality of electricalcontacts for electrically connecting the first semiconductor die to asubstrate, a second surface, and a plurality of vias extending throughsaid interposer from said first surface to said second surface, thefirst semiconductor die having a plurality of bond pads on a surfacethereof and a back surface, the first semiconductor die positioned in aback-to-back configuration with another semiconductor die of said atleast two semiconductor die and attached to said interposer to form anintermediate packaging structure; at least one contact of said pluralityof contacts of said flexible interposer connected to the at least onecontact pad of said substrate.
 8. The package of claim 7, wherein saidvias are filled with conductive metal.
 9. The package of claim 7,wherein said second surface surrounds at least three sides of the firstsemiconductor die around which said interposer is folded.
 10. Theinterposer of claim 7, wherein said second surface surrounds at leasttwo sides of the first semiconductor die around which said interposer isfolded.
 11. The package of claim 7, wherein at least one bond pad ofsaid bond pads of said first semiconductor die is in electricalcommunication with at least one electrical contact of said electricalcontacts of said flexible interposer through said vias therein.
 12. Thepackage of claim 7, wherein said interposer folds around more than twosemiconductor die by weaving in a serpentine fashion around groups ofsemiconductor die including two semiconductor die.
 13. The package ofclaim 7, wherein said substrate comprises a semiconductor device. 14.The package of claim 7, wherein said substrate further comprises aprinted circuit board.
 15. The package of claim 7, further comprisingelectrical contacts applied to a top surface of said package.
 16. Amethod of packaging at least one semiconductor die in a high densityarrangement comprising: providing a substrate; providing a flexibleinterposer including a first surface having a plurality of electricalcontacts for electrically connecting at least one semiconductor die to asubstrate, a second surface, and a plurality of vias extending throughsaid flexible interposer from said first surface to said second surface;providing at least one semiconductor die having a plurality of bond padson a first surface thereof; attaching said at least one semiconductordie to said flexible interposer forming an intermediate structure, saidinterposer being folded around said at least one semiconductor die, saidat least one die being in electrical communication with said substratethrough said flexible interposer; and attaching said intermediatestructure to said substrate.
 17. The method of claim 16, wherein saidvias are filled with conductive metal.
 18. The method of claim 16,wherein said second surface surrounds at least three sides of the atleast one semiconductor die around which said interposer is folded. 19.The interposer of claim 16, wherein said second surface of saidinterposer surrounds at least two sides of the at least onesemiconductor die around which said interposer is folded.
 20. The methodof claim 16, wherein said bond pads are in electrical communication withsaid electrical contacts through said vias in the flexible interposer.21. The method of claim 16, wherein said interposer folds around morethan two semiconductor die in a serpentine fashion around groupsincluding at most two semiconductor die therein.
 22. The method of claim16, further comprising applying electrical contacts to a top surface ofa high density semiconductor package to attach semiconductor devices tosaid package.
 23. A method of forming a high density semiconductorpackage comprising: providing at least one semiconductor die having aplurality of bond pads on a surface of said at least one die; providingan interposer including a first surface having a plurality of electricalcontacts, a second surface, and a plurality of vias extending throughsaid interposer from said first surface to said second surface;attaching said at least one die to said interposer to form anintermediate packaging structure; providing a substrate; attaching saidsubstrate to said intermediate structure; and connecting between saidsubstrate and said at least one semiconductor die.
 24. The method ofclaim 23, wherein said attaching said at least one die furthercomprises: attaching multiple semiconductor die in groups of twosemiconductor die, said semiconductor die having a in a back-to-backconfiguration, the back side of one semiconductor die substantiallycontacting the back side of another semiconductor die of a group. 25.The method of claim 23, wherein said electrical contacts and said bondpads provide electrical communication through said vias of the flexibleinterposer.
 26. The method of claim 23, further comprising: formingelectrical contacts on a top surface of said package to attachsemiconductor device components.
 27. A computer system comprising: aninput device; an output device; a processor, coupled to said inputdevice and said output device; and a memory module, coupled to saidprocessor, comprising: a module board having at least one electricalcircuit in electrical communication with at least one high densitysemiconductor package; and said high density semiconductor packageattached to and in electrical communication with said module board, saidpackage comprising: a flexible interposer folded around at least onesemiconductor die, said interposer including a first surface having aplurality of electrical contacts for electrically connecting said atleast one semiconductor die to a substrate, a second surface, and aplurality of vias extending through said interposer from said firstsurface to said second surface, said at least one semiconductor diehaving a plurality of bond pads on a surface thereof and a back sidesurface, said at least one semiconductor die attached to said interposerto form an intermediate packaging structure; and said substrate attachedto said intermediate packaging structure, said substrate connected tosaid die through said electrical contacts and bond pads.
 28. Thecomputer system of claim 27, wherein said substrate comprises a printedcircuit board.
 29. The computer system of claim 27, wherein said systemfurther comprises a cellular telephone.
 30. The computer system of claim27, wherein said system further comprises a personal digital assistant.